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FPGA Verilog student projects

Cornell University, , Prof. Bruce Land

Updated On 02 Feb, 19

Overview

Includes

Lecture 13: Real-time cartoonifier on FPGA

4.1 ( 11 )


Lecture Details

Our project is a real time cartoonifier. It bolds edges and reduces colors to make the video feed look like a cartoon. The colors can be reduced on a per channel basis from 3 bits per color all the way down to grayscale. Cartoonization is the act of modifying an image so it looks as if it were rendered by a computer or sketched by an artist. This includes bolding any edges or contours in the image and making colors brighter and more vibrant. In addition the amount of colors used in the image is reduced and smoothed out. In our implementation the number of possible colors is selectable by the user. See
httppeople.ece.cornell.edulandcoursesece5760FinalProjectsf2010kaf42_jay29_teg25teg25_jay29_kaf42index.html

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Sam

Excellent course helped me understand topic that i couldn't while attendinfg my college.

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Dembe

Great course. Thank you very much.

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