Digital System Design

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2 STUDENTS

Introduction to digital system – Number Systems – Complement Numbers – Complement Subtraction and codes – Review of First Four Lectures and Introduction to logic Gates – Basic Boolean Circuits – K’ Map Simplification of Boolean Functions – Logic Simplification Using Nand & Nor Gates – Introduction to MSI Circuits-Multiplexer – Introduction to MSI Circuits-Encoder,Decoder,Parity Generator – Adder & subtractor – Bcd adder, Carry look ahead adder – Programmable Logic Devices-ROM – Programmable Logic Array & Programmable Array Logic – Introduction to Sequential Circuit, S-R Flipflop – Continuation of D, J-k & T Flip-Flops – Master-Slave Flip Flop, Flip-Flop Timings,Revision Problems – Ripple Counters – Synchronous Counters – Shift Registers & Sequential Circuit Design – Analysis Of Finite State Machines – Design Of Finite State Machines – State Reduction & Implementation of Fsm Using Mux and P-Rom – Algorithmic Statemachines Introduction & Examples – System Design Example – Traffic Light Controller – Memory System Design – Memory Design Example of Logic Families

Course Curriculum

 Introduction to digital system Details 1:7:19 Number Systems Details 1:25:10 Complement Numbers Details 23:54 Complement Subtraction and codes Details 1:22:33 Review of First Four Lectures and Introduction to logic Gates Details 1:15:11 Basic Boolean Circuits Details 1:21:23 K’ Map Simplification of Boolean Functions Details 1:10:24 Logic Simplification Using Nand & Nor Gates Details 1:15:38 Introduction to MSI Circuits-Multiplexer Details 1:28:19 Introduction to MSI Circuits-Encoder,Decoder,Parity Generator Details 1:31:33 Adder & subtractor Details 1:21:3 Bcd adder, Carry look ahead adder Details 1:11:53 Programmable Logic Devices-ROM Details 1:22:15 Programmable Logic Array & Programmable Array Logic Details 1:20:44 Introduction to Sequential Circuit, S-R Flipflop Details 57:49 Continuation of D, J-k & T Flip-Flops Details 1:20:35 Master-Slave Flip Flop, Flip-Flop Timings,Revision Problems Details 1:14:42 Ripple Counters Details 1:17:30 Synchronous Counters Details 1:30:30 Shift Registers & Sequential Circuit Design Details 1:22:50 Analysis Of Finite State Machines Details 1:21:50 Design Of Finite State Machines Details 1:25:37 State Reduction & Implementation of Fsm Using Mux and P-Rom Details 1:4:55 Algorithmic Statemachines Introduction & Examples Details 1:18:46 System Design Example – Traffic Light Controller Details 1:9:31 Memory System Design Details 1:12:47 Memory Design Example of Logic Families & Course Summary Details 1:18:28

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