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Computer Architecture II

Other,, Spring 2013 , Prof. Onur Mutlu

Updated On 02 Feb, 19

Overview

Introduction and Basics - Fundamental Concepts and ISA - ISA Tradeoffs - More ISA Tradeoffs - ISA Wrap-Up, Single-Cycle- Multi-Cycle Microarchitecture - Microprogramming - Pipelining - Data Dependence Handling - Control Dependence Handling - Branch Prediction - Predication and Exceptions - State Maintenance & Recovery - Out-of-Order Execution - Data Flow and SIMD - Virtual Memory - SIMD and GPUs - GPUs, VLIW, Systolic Arrays - Static Instruction Scheduling - Memory Hierarchy - Caches - Advanced Caches - Main Memory and DRAM Basics - Memory Controllers & Scheduling - Memory Scheduling - Runahead Execution - Prefetching - Advanced Prefetching - Multiprocessors - Consistency & Coherence - Interconnects - Heterogeneous Multi-Core - Emerging Memory Tech

Includes

Lecture 25: Main Memory and DRAM Basics

4.1 ( 11 )


Lecture Details

Lecture 25 Main Memory
Lecturer Prof. Onur Mutlu (httpusers.ece.cmu.edu~omutlu)
Date April 3, 2013.

Lecture 25 slides (pdf) httpwww.ece.cmu.edu~ece447s13libexefetch.php?media=onur-447-spring13-lecture25-mainmemory-afterlecture.pdf
Lecture 25 slides (ppt) httpwww.ece.cmu.edu~ece447s13libexefetch.php?media=onur-447-spring13-lecture25-mainmemory-afterlecture.ppt

Course webpage httpwww.ece.cmu.edu~ece447s13
Lecture materials httpwww.ece.cmu.edu~ece447s13doku.php?id=schedule

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Comments
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Sam

Excellent course helped me understand topic that i couldn't while attendinfg my college.

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Dembe

Great course. Thank you very much.

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