COURSE LAYOUT
Week 1: Review of Basic Computer Organization, Performance Evaluation Methods, Introduction to RISC Instruction Pipeline, Instruction Pipeline and Performance. Week 2: Pipeline Hazards and Analysis, Branch Prediction, MIPS Pipeline for Multi-Cycle Operations. Week 3: Compiler Techniques to Explore Instruction Level Parallelism, Dynamic Scheduling with Tomasulos Algorithm and Speculative Execution. Week 4: Advanced Pipelining and Superscalar Processors, Exploiting Data Level Parallelism: Vector and GPU Architectures, Architectural Simulation using gem5. Week 5: Introduction to Cache Memory, Block Replacement Techniques and Write Strategy, Design Concepts in Cache Memory. Week 6: Basic and Advanced Optimization Techniques in Cache Memory, Cache Optimization using gem5. Week 7: Introduction to DRAM System, DRAM Controllers and Address Mapping, Secondary Storage Systems, Design Concepts in DRAM and Hard Disk. Week 8: Tiled Chip Multicore Processors(TCMP), Routing Techniques in Network on Chip(NoC), NoC Router Microarchitecture, TCMP and NoC: Design and Analysis, Future Trends in Computer Architecture Research.
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